MESIF protocol
The MESIF protocol is a cache coherency and memory coherence protocol developed by Intel for cache coherent non-uniform memory architectures. The protocol consists of five states, Modified (M), Exclusive (E), Shared (S), Invalid (I) and Forward (F).The M, E, S and I states are the same as in the MESI protocol. The F state is a specialized form of the S state, and indicates that a cache should act as a designated responder for any requests for the given line. The protocol ensures that, if any cache holds a line in the S state, at most one (other) cache holds it in the F state.
MESIF protocol - Wikipedia Jump to content From Wikipedia, the free encyclopedia Intel cache and memory coherence protocol The MESIF protocol is a cache coherency and memory coherence protocol developed by Intel for cache coherent non-uniform memory architectures . [ 1 ] The protocol consists of five states, Modified (M), Exclusive (E), Shared (S), Invalid (I) and Forward (F). [ 2 ] The M, E, S and I states are the same as in the MESI protocol . The F state is a specialized form of the S state, and indicates that a cache should act as a designated responder for any requests for the given line.
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