Application Specific Integrated Circuit (ASIC) Floorplan Automation - Part I | MakinaRocks Tech Blog
MakinaRocks’ Combinatorial Optimization Problem (COP) team is working on a floorplan automation project, which automates component placement on Application-Specific Integrated Circuits (ASICs). In this post, we will provide a summary of the concept of floorplan automation in the semiconductor industry, outline the challenges the COP team is presently addressing, detail the strategies employed to tackle these issues, as well as the results obtained thus far. In the next post, we will address how our COP team has been solving the problem in greater detail.
MakinaRocks’ Combinatorial Optimization Problem (COP) team is working on a floorplan automation project, which automates component placement on Application-Specific Integrated Circuits (ASICs). In this post, we will provide a summary of the concept of floorplan automation in the semiconductor industry, outline the challenges the COP team is presently addressing, detail the strategies employed to tackle these issues, as well as the results obtained thus far. In the next post, we will address how our COP team has been solving the problem in greater detail. Reinforcement learning, taking on…
saved by
related reading
- rachel2020regds.pdfcadforassurance.org
- How FPGAs work, and why you'll buy oneyosefk.com
- Layman's Guide to IC Reverse Engineeringsiliconzoo.org
- A friendly introduction to machine learning compilers and optimizershuyenchip.com
- Chip Design: AI Alone Isn’t Ready for Chip Designspectrum.ieee.org
- Intelligent OPC Engineer Assistant for Semiconductor Manufacturingarxiv.org
- ASIC vs FPGA: A Comprehensive Comparisonwevolver.com
- Meta harness makes 10 times better Kimi K3 chipluoluo.ai
- Chip design from the bottom up – Reiner Popeyoutube.com
- As Rocks May Think | Eric Jangevjang.com
- Ending an Ugly Chapter in Chip Designspectrum.ieee.org
- Application-specific integrated circuit - Wikipediaen.wikipedia.org