Huawei $\tau$ Chip Myth Debunked: Thermals
The paper argues that 3D logic integration can reduce power and power density by shortening interconnects, challenging the conventional notion that vertical stacking inevitably produces higher temperatures. Demonstrates Huawei's LogicFolding technology on Kirin processors
The paper demonstrates that LogicFolding, a 3D logic integration technology used in Huawei's Kirin processors, can reduce power and power density by shortening interconnects and increasing transistor density. Kirin 2026, utilizing LogicFolding, achieved substantial power reductions: 66% for the NPU, 58% for the GPU, and 41% for the CPU performance core. LogicFolding was most effective in tasks with high parallelism, such as the NPU and GPU, while the CPU experienced smaller benefits due to its more serial critical paths Central thesis and contribution The paper argues that 3D logic…
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