[2603.04304] $V_1$: Unifying Generation and Self-Verification for Parallel Reasoners
Abstract:Test-time scaling for complex reasoning tasks shows that leveraging inference-time compute, by methods such as independently sampling and aggregating multiple solutions, results in significantly better task outcomes. However, a critical bottleneck is verification: sampling is only effective if correct solutions can be reliably identified among candidates. While existing approaches typically evaluate candidates independently via scalar scoring, we demonstrate that models are substantially stronger at pairwise self-verification. Leveraging this insight, we introduce $V_1$, a framework that unifies generation and verification through efficient pairwise ranking. $V_1$ comprises two components: $V_1$-Infer, an uncertainty-guided algorithm using a tournament-based ranking that dynamically allocates self-verification compute to candidate pairs whose relative correctness is most uncertain; and $V_1$-PairRL, an RL framework that jointly trains a single model as both generator and pairwise self-verifier, ensuring the verifier adapts to the generator's evolving distribution. On code generation (LiveCodeBench, CodeContests, SWE-Bench) and math reasoning (AIME, HMMT) benchmarks, $V_1$-Infer improves Pass@1 by up to $10%$ over pointwise verification and outperforms recent test-time scaling methods while being significantly more efficient. Furthermore, $V_1$-PairRL achieves $7$--$9%$ test-time scaling gains over standard RL and pointwise joint training, and improves base Pass@1 by up to 8.7% over standard RL in a code-generation setting.
[2603.04304] $V_1$: Unifying Generation and Self-Verification for Parallel Reasoners Skip to main content arXiv is now an independent nonprofit! Learn more × Search arXiv Press Enter to search · Advanced search --> Computer Science > Computation and Language arXiv:2603.04304 (cs) [Submitted on 4 Mar 2026] Title: $V_1$: Unifying Generation and Self-Verification for Parallel Reasoners Authors: Harman Singh , Xiuyu Li , Kusha Sareen , Monishwaran Maheswaran , Sijun Tan , Xiaoxia Wu , Junxiong Wang , Alpay Ariyak , Qingyang Wu , Samir Khaki , Rishabh Tiwari , Long Lian , Yucheng Lu ,
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