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Lab 4 | CS 61C Fall 2022

inst.eecs.berkeley.edu · 179 words · saved by 1 readers

Like last week, we will be using the Venus RISC-V simulator. Also, please refer to the Venus reference on our course website when you need a refresher on any of the Venus features. Mount the lab 4 files as you did with Lab 3. We have provided a review of calling convention below for your reference. We recommend reading over it if you are not feeling comfortable with calling convention. The RISC-V CPU that we are using only has 32 registers and not all of those registers can be used for data storage by every program. You might think this is a problem if ever we are planning to implement complex programs that need to hold several data variables. However, this is not really a limitation since we have access to the stack memory which we can also use for temporary storage. The data in the registers can be saved somewhere in the stack, so that the same registers can be reused by other functions that will be called (callee). Later on, the data saved in the stack can then be retrieved again ba

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